Integration of the NVIDIA Deep Learning Accelerator

Published: Nov 14, 2019 by Paolo Mantovani

It is now possible to create an ESP instance with one or multiple accelerator tiles hosting the NVIDIA Deep Learning Accelerator (NVDLA). This feature is available with RISC-V only, when selecting Ariane for the ESP processor tile.

This is the first example showing how ESP can integrate third-party accelerators in any accelerator tile thanks to a new accelerator socket based on the open standard AXI bus protocol.

ESP SLD open-source-hardware NVIDIA NVDLA Accelerator