We will present a tutorial on ESP at
Professor Carloni will give a
talk titled “Scalable Open-Source System-on-Chip Design” at the
VLSISoC conference on
October 7th, 2020.
Our paper Ariane+NVDLA: Seamless Third-Party IP Integration with ESP will
appear at CARRV.
The material for the ASPLOS 2020 tutorial is available on the tutorial
page under the Program section.
New tutorials: Design an accelerator in Keras/Pytorch/ONNX and
Design a many-accelerator SoC.