Release 2026.1.0

Published: Mar 25, 2026 by Biruk Seyoum

ESP 2026.1.0 is now available.

This release moves main-memory access from AHB to AXI, improves AXI-to-NoC burst transfers, makes the FPGA memory-link width configurable, and enables two memory tiles on VCU118. It also refreshes the SoC configuration GUI, updates the Catapult SystemC flow and ASIC build infrastructure, expands AXI support across the supported FPGA boards, and includes a collection of architecture, software, and build fixes.

See the official release notes for the full list of changes.

ESP SLD open-source OSH open-source-hardware accelerators SoC RISC-V GitHub release