Documentation

How to: design an accelerator in C/C++ (Xilinx Vivado HLS)


Tutorial guide:

Guide

Tutorial videos:

See How to: design an accelerator in SystemC (Cadence Stratus HLS)


What you will learn

  • Generate a customized accelerator
    • source code skeleton
    • testbench
    • Vivado HLS synthesis scripts
    • device driver
    • user-space application skeleton
  • Implement accelerator-specific code in C++
    • computation kernel
    • input and golden output
    • validation
  • Integrate a new accelerator into an ESP instance and test it on FGPA


What you will need

  • Prerequisites
  • Equipment
    • One of the supported FPGA boards (see homepage)
    • (optional) An internet router
  • (optional) Prebuilt material
    • The source code, testbench and Vivado HLS scripts for the MAC accelerator
    • The device drivers for the MAC accelerator
    • Two design folders for Xilinx VCU118 and Xilinx VC707

What you can read

ESP4ML: Platform-Based Design of Systems-on-Chip for Embedded Machine Learning
Davide Giri, Kuan-lin Chiu, Giuseppe Di Guglielmo, Paolo Mantovani, Luca P. Carloni
In Proceedings of the Design, Automation and Test in Europe Conference (DATE), 2020

PAPER


What you can contribute

The ESP team welcomes external contributions and collaborations on a variety of topics including but not limited to:

  • Accelerator designs for a wide range of application domains

  • Support for more HLS tools

Check out our contributing guidelines.