How to: design an accelerator in Keras/Pytorch/ONNX (hls4ml)
Tutorial guide:
Tutorial video:
Note: The video tutorial was not recorded with the latest version of the ESP repository. While watching the video, please refer to the written tutorial guide for the most up to date instructions.
What you will learn
- Integrate in ESP an accelerator designed in Keras/Pytorch/ONNX and generated with hls4ml
- Generate the accelerator with hls4ml
- Run an ESP interactive script to integrate the accelerator into ESP and to generate the Linux device driver and multiple test applications
- Instantiate the new accelerator into an ESP SoC and test the full system with RTL simulation and on FPGA
What you will need
- Prerequisites
- Equipment
- One of the supported FPGA boards (see homepage)
- (optional) An internet router
- (optional) Prebuilt material
What you can read
ESP4ML: Platform-Based Design of Systems-on-Chip for Embedded Machine Learning
Davide Giri, Kuan-lin Chiu, Giuseppe Di Guglielmo, Paolo Mantovani, Luca P. Carloni
In Proceedings of the Design, Automation and Test in Europe Conference (DATE), 2020
What you can contribute
The ESP team welcomes external contributions and collaborations on a variety of topics including but not limited to:
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Accelerator designs for a wide range of application domains
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Support for more HLS tools
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Support for accelerator design flows from domain-specific languages (DSL).
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Power estimation flow
Check out our contributing guidelines.