How to: design a many-accelerator SoC

Tutorial guide:


Multi-accelerator DEMO with the ESP monitors on reconfigurable cache-coherence for accelerators

What you will learn

  • Create a multi-accelerator instance of ESP
  • Use the ESP software API to configure a multi-accelerator application
    • Run-time coherence reconfiguration
    • Concurrent execution
    • Point-to-point communication

What you will need

What you can read

ESP4ML: Platform-Based Design of Systems-on-Chip for Embedded Machine Learning
Davide Giri, Kuan-lin Chiu, Giuseppe Di Guglielmo, Paolo Mantovani, Luca P. Carloni
In Proceedings of the Design, Automation and Test in Europe Conference (DATE), 2020


Runtime Reconfigurable Memory Hierarchy in Embedded Scalable Platforms
Davide Giri, Paolo Mantovani, Luca P. Carloni
In Proceedings of the Asia and South Pacific Design Automation Conference (ASPDAC), 2019


What you can contribute

The ESP team welcomes external contributions and collaborations on a variety of topics including but not limited to:

  • Improved user-level API for accelerators configuration and scheduling

  • Novel algorithms for run-time selection of the cache coherence model for multi-accelerator applications

Check out our contributing guidelines.